One is familiar from previous designs with the use of memory modules of the DIMM (Dual In-line Memory Module) type in computer equipment, where these memory modules generally take the form of 64-bit memory bars, equipped with 84 connectors on each side, making 168 in all. A “daisy chain” topology is often employed to establish the connection between the memory modules. More particularly, such a topology is used between modules of the FBD type (Fully Buffered Dimm; JEDEC JC-45.4). The expression “daisy chain” used to indicate a method of connection between modules, or between machines, that uses a single logic line to connect the modules to each other.
An essential point of the FB-DIMM channel architecture is thus a high-speed serial point-to-point connection between the memory controller and the modules in the channel. In a manner that is already known, the FBD modules are connected in a “daisy chain” on an FB-DIMM channel. These FBD modules are equipped with advanced memory buffer circuits (AMB) in accordance with the JEDEC AMB (Advanced Memory Buffer) specifications. The AMB chip placed on each FBD module collects and distributes the data exiting or entering a module, buffers the data in the chip and receives them from or sends them to the FBD module or the next memory controller. This channel structure overcomes the problems of buffer latency, which are common in the register-type DIMM technology, and enables the designers to use a large number of FBD modules in a given system. It is possible to place up to 8 DIMM modules in one channel.
In prior art, the FBD modules or bars are connected in a daisy chain fashion, in which they are spaced regularly from each other (see documents US 2004/0123016 and U.S. Pat. No. 6,658,509, for example). In this chain, the electrical distance constraints between 2 consecutive bars are very severe, given the electrical characteristics of the link (high speeds with several billiards transfers per second (GT/s), for example, the desire to achieve very narrow tracks on the cards, compatibility with standard and inexpensive card materials, FR4 flame resistance, and so on), and those of the AMB circuit, for which it is necessary to minimise heat dissipation and also production costs.
Thus at throughputs of 6.4 GT/s, the generally accepted recommendation for the separation between 2 modules or consecutive bars on the same card is that it should be between 8.9 and 22.8 mm. In addition, a separation of 22.8 mm is possible only if the two bar connectors are on the same support, with the permitted distances being further reduced otherwise. By way of an example, it is not permitted to create a connection linking FBD modules located on different superimposed stages because of the excessively large spacing between the stages (the distance between the bars then no longer observes the aforementioned constraints).
There is therefore a need to broaden the scope of the topologies that are available to the FB-Dimm memory modules.